rusty_mos::memory

Module regions

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Definitions about the memory / page and conventions. Include some helper functions to do the conversion.

The virtual address (32-bit) structure is as follows:

| 31                 22 | 21             12 | 11           0 |
| Page Directory Offset | Page Table Offset | In-Page Offset |

The page table entry (PTE, 32-bit) structure is as follows:

| 31                 12 | 11               6 | 5                0 |
| Physical Frame number | Flags for hardware | Flags for software |

Constants§

  • Kernel memory starts from here
  • KSEG1 Segment
  • Kernel stack end at here (the end in the linking script).
  • The maximum count of all the asid
  • The physical page size (in bytes).
  • Bytes mapped by a page directory entry.
  • Shifted the Page Table Offset and In-Page Offset out to get the Page Directory Offset
  • Shifted the In-Page Offset out to get the Page Table Offset
  • Cache Coherency Attributes bit. If set, this entry is cache-able.
  • Dirty bit, but really a write-enable bit. 1 to allow writes, 0 and any store using this translation will cause a tlb mod exception (TLB Mod).
  • Global bit. When this bit in a TLB entry is set, that TLB entry will match solely on the VPN field, regardless of whether the TLB entry’s ASID field matches the value in EntryHi.
  • Page table / directory entry flag shift
  • Valid bit. If 0 any address matching this entry will cause a tlb miss exception (TLBL/TLBS).
  • PTMAP 🔒
    Bytes mapped by a page table entry (Actually is the PAGE_SIZE).
  • Reserved for COW (start address).
  • The kernel array ENVS will be mapped here.
  • The high-limits of user’s memory
  • The kernel array PAGES will be mapped here.
  • Normal user stack top.
  • Reserved for temporary usage (start address).
  • User test segment start.
  • The uer’s space higher boundary.
  • User’s page tables are stored here (for a PDMAP size).
  • The exception stack top for the user. See also: UTOP.